Question 4 [5 marks x 4 = 20 marks]
Consider the circuit of Figure 4. Assume that the switch is closed at time t=0. Noting that u(-t)=1, t0; and u(-t)=1-u(t), compute and plot:
(a) i(t) for all time. (b) v(t) for all time. (c) Analyse the steady-state of the circuit using phasor diagram. (d) Use PSpice, a computer software used for the analysis of electric circuits, to find the voltages at the nodes of the circuit in Figure 4 when the switch is closed.