1264

A computer uses a byte-addressable virtual memory system with a two-entry TLB (translation look-aside buffer), a 2-way set associative cache, and a page table for a process P.  Cache blocks are 8 bytes in size, while pages are 16 bytes in size. Assume, for the sake of this problem,that main memory contains only 4 frames and that the TLB and page table contents for Process P are as shown below:

 

TLB

page

frame

0

3

  4

1

 

 

Page Table

 

  frame

Valid

0

3

1

1

0

1

2

–

0

3

2

1

4

1

1

5

–

0

6

–

0

7

–

0

 

c)       (5) What is the minimum number of bits required for virtual addresses?

 

d)      (5) What is the minimum number of bits required for physical addresses?

 

e)      (3) If the virtual address 0x38 is referenced, would a TLB hit occur?

 

f)        (8) To what physical address (if any) does virtual address 0x38 correspond?